Christine RAYNAUD Christine RAYNAUD received the Engineer degree in Electronics and the Ph.D degree from the National Polytechnic Institute of Grenoble, France, in 1984 and 1988, respectively. During her doctoral research at CEA-LETI, she has demonstrated the potential in high-frequency range of sub-micrometer MOS devices on high resistivity bulk substrate, by innovative HF characterization on silicon and modeling. In 1989, she joined CEA-LETI, where she worked on the electrical characterization and the modeling of Partially Depleted Silicon-On-Insulator (SOI) devices. From 1993 to 2000, her main research interests were oriented to the process integration, the device design and the optimization of advanced sub-micrometer SOI devices on ultra-thin SOI film (Fully Depleted SOI devices). She was a Technical Committee member of the IEEE International SOI Conference from 1998 to 2000. From 2001 to 2010, she has been a LETI assignee at STMicroelectronics where she had the responsibility of the 0.13µm and then 65nm Partially Depleted SOI CMOS process development for RF applications. Since 2011, she has been in charge of creating new partnerships between CEA-LETI and industrial companies. Since 2015, she is also responsible of the strategy and roadmap definition in the field of RF Technologies and Components. She is author and coauthor of about 100 international communications in the field of microwave and/or SOI devices, including invited papers at various international conferences.
Talk Abstract:

5G gives a huge opportunity for innovation in RF technologies, targeting more than 10Gbps to enhance mobile broadband. From 3G to 4/5G, the complexity of radio terminals has been drastically increased, especially for RF Front End Modules. They are composed of RF switches (antenna and mode switches), Power Amplifiers and filters. Carrier Aggregation, MIMO and high complexity modulation are the main technology pathfinders towards 5G. All bands combinations has created the need for a simpler and lower cost integration. There are now tens of RF switches in smartphones and RF SOI switches have replaced GaAs PHEMT switches because they enable more integration: RF switches and CMOS control function on a same chip. This tutorial will show how to optimize SOI RF switches with PD SOI CMOS technologies. On the other hand, there is a need of high performance LNA to get a better sensitivity in RX part. This tutorial will show how PD SOI enables high quality passives thanks to a high resistivity substrate; therefore, high performance LNA, with a low NFmin, and RF switches can be integrated on a same chip, resulting to more integration. Finally, Power Amplifiers, which are currently on GaAs in RF Front End Modules, could be also integrated on SOI. For this purpose, high voltage devices are required. The main advantage of SOI CMOS, compared to Silicon CMOS, is to allow the stacking of devices without degrading performances. But it must be done without degrading the reliability. Stacking high voltage thick gate oxide devices with high gain thin gate oxide devices, using SOI CMOS technologies, makes possible the integration of high efficiency power amplifiers with RF SOI switches.