Jean-Pierre Raskin Jean-Pierre RASKIN (IEEE M’97, IEEE SM’06, IEEE F’14) was born in Aye, Belgium, in 1971. He received the Industrial Engineer degree from the Institut Supérieur Industriel d’Arlon, Belgium, in 1993, and the M.S. and Ph.D. degrees in Applied Sciences from the Université catholique de Louvain (UCL), Louvain-la-Neuve, Belgium, in 1994 and 1997, respectively. From 1994 to 1997, he was a Research Engineer at the Microwave Laboratory, UCL, Belgium. He worked on the modeling, characterization and fabrication of MMIC’s in Silicon-on-Insulator (SOI) technology for low-power, low-voltage applications. In 1998, he joined the EECS Department of The University of Michigan, Ann Arbor, USA. He has been involved in the development and characterization of micromachining fabrication techniques for microwave and millimeter-wave circuits and microelectromechanical transducers/amplifiers working in harsh environments. In 2000, he joined the Microwave Laboratory of UCL, Louvain-la-Neuve, Belgium, as Associate Professor, and he has been a Full Professor since 2007. From September 2009 to September 2010, he was visiting professor at Newcastle University, Newcastle Upon Tyne, UK. Since 2014 he has been the head of the Electrical Engineering Department of UCL.
His research interests are the modeling, wideband characterization and fabrication of advanced SOI MOSFETs as well as micro and nanofabrication of MEMS / NEMS sensors and actuators, including the extraction of intrinsic material properties at nanometer scale.
He is IEEE Fellow, EuMA Associate Member, Société de l’électricité, de l’électronique et des technologies de l’information et de la communication (SEE) Member, and Material Research Society (MRS) Member. He was the recipient of the Médaille BLONDEL 2015, famous French reward that honors each year a researcher for outstanding advances in science which have demonstrated a major impact in the electrical and electronics industry. He received the SOI Consortium Award in 2016 in recognition in his vision and pioneering work for RF SOI. He is author or co-author of more than 700 scientific articles.
Talk Abstract:

Performance of RF integrated circuit (IC) is directly linked to the analog and high frequency characteristics of the transistors, the quality of the back-end of line process as well as the electromagnetic properties of the substrate. This last decade Silicon-on-Insulator (SOI) MOSFET technology has demonstrated its potentialities for high frequency commercial applications pushing the limits of CMOS technology. Thanks to the introduction of the trap-rich high-resistivity SOI substrate on the market, the ICs requirements in term of linearity for RF switches, for instance, are fulfilled. Today partially depleted SOI MOSFET is the mainstream technology for RF SOI systems. Future generations of mobile communication systems will require transistors with better high frequency performance at lower power consumption. The advanced MOS transistors in competition are FinFET and Ultra Thin Body and Buried oxide (UTBB) SOI MOSFETs. Both devices have been intensively studied these last years. Most of the reported data concern their digital performance. In this lecture, their analog/RF behavior is described and compared. Both show pretty similar characteristics in terms of transconductance, Early voltage, voltage gain, self-heating issue but UTBB outperforms FinFET in terms of cutoff frequencies thanks to their relatively lower fringing parasitic capacitances. The use of specific RF test structures at the early stage of a technological node development is of first importance to analyze the transistor parasitic resistances and capacitances, the transistor cutoff frequencies, the self-heating, and the substrate coupling and non-linear behavior.