Due to our profound experience in the domain of Silicon-on-Insulator (SOI) substrates, at Incize we can support our customers from the initial phase of generating a new idea to the  physics-based modeling phase.

We are proud to deliver our customers with accurate results for a wide range of applications. Substrate solutions that we have offered to our existing customers results have helped them to develop a diverse range of products. These include innovative silicon wafer substrates, novel imaging pixels, complex MEMS substrates and mobile applications substrates.

At Incize we offer:
  • Substrate quality assessment using innovative non-destructive techniques
  • Measurements and modeling of substrates RF and linear capabilities
  • Testing of the electrical quality of interfaces between different layers in the substrate
  • Wide frequency band and nonlinearities characterization using state of the art equipment
  • TCAD simulations of novel structures and materials

Incize uses in-house designed test structures to characterize and extract figures of merit that accurately describe various substrate characteristics. We can also design and fabricate new test structures or use the ones provided by a customer.

Our facilities support a wide frequency range (0 to 110 GHz), a wide power handling (-25 to +40 dBm) and extreme temperature environments (4 K to 600 K)


Contact us to find out more: info at incize dot com

Related publications
  1. J.-P. Raskin, A. Viviani, D. Flandre and J.-P. Colinge, “Substrate Crosstalk reduction using SOI technology”, IEEE Transactions on Electron Devices, vol. 44, no. 12, pp. 2252-2261, December 1997.
  2. V. Kilchytska, G. Pailloncy, D. Lederer, J.-P. Raskin, N. Collaert, M. Jurczak and D. Flandre, “Frequency Variation of the Small-Signal Output Conductance of Decananometer MOSFETs Due to Substrate Crosstalk”, IEEE Electron Device Letters, vol. 28, no. 5, pp. 419-421, May 2007.
  3. D. Lederer and J.-P. Raskin, “RF performance of a commercial SOI technology transferred onto a passivated HR silicon substrate”, IEEE Transactions on Electron Devices, vol. 55, no. 7, pp. 1664-1671, July 2008.
  4. K. Ben Ali, C. Roda Neve, A. Gharsallah, J.-P. Raskin, “Ultra wide frequency range crosstalk into standard and trap-rich high resistivity”, IEEE Transactions on Electron Devices, vol. 58, no. 12, pp. 4258-4264, December 2011.
  5. C. Roda Neve and J.-P. Raskin, “RF harmonic distortion of CPW lines on HR-Si and trap-rich HR-Si substrates”, IEEE Transactions on Electron Devices, vol. 59, no. 4, pp. 924-932, April 2012.